RTL Source Reference (v002)¶
This section embeds key SystemVerilog modules from the pccx v002 RTL repository: hwkim-dev/pccx-FPGA-NPU-LLM-kv260.
The RTL is cloned into codes/v002/ at CI build time. Local
development requires a manual clone:
git clone https://github.com/hwkim-dev/pccx-FPGA-NPU-LLM-kv260 codes/v002